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首页 > 推广型号列表 >XCS20XLVQ100

XCS20XLVQ100

XCS20XLVQ100资料
XCS20XLVQ100
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Manufacturer:XILINX
Description:NOTES  1Typicals represent average readings at 25C and VDD = 5 V, VSS = 0 V.  2Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper   positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I W = VDD/R for both VDD = 5 V,   VSS = 0 V.  3VAB = VDD, Wiper (VW) = No connect.  4INL and DNL are measured at V W with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V A = VDD and VB = 0 V. DNL   specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions.  5Resistor Terminals A, B, W have no limitations on polarity with respect to each other.  6Guaranteed by design and not subject to production test.  7Measured at the A X terminals. All A X terminals are open-circuited in shut-down mode.  8PDISS is calculated from (IDD VDD). CMOS logic level inputs result in minimum power dissipation.  9All dynamic characteristics use V DD = 5 V, VSS = 0 V. 10Measured at a V W pin where an adjacent V W pin is making a full-scale voltage change. 11See timing diagram for location of measured values. All input control voltages are specified with t R = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage level of   1.5 V. Switching characteristics are measured using V DD = 5 V. 12Propagation delay depends on value of V DD, RL, and CL; see applications text.
 
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型 号:XCS20XLVQ100
厂 家:XILINX
封 装:QFP
批 号:07+
数 量:2000
说 明:100%真实库存,原装,部分现货
 
 
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