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XC2S30VQ100资料 | |
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XC2S30VQ100 PDF Download |
File Size : 116 KB
Manufacturer:XILINX Description:When both clock inputs (CK, CK) are logic low, the device enters in a low power mode. An input logic detection circuit on the differential inputs, independent from input buffers, detects the logic low level and performs in a low power state where all outputs, the feedback, and the PLL are off. When the clock inputs transition from being logic low to being differential signals, the PLL turns back on, the inputs and the outputs are enabled, and the PLL obtains phase lock between the feedback clock pair (FBIN, FBIN) and the clock input pair (CK, CK) within the specified stabilization time. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:XC2S30VQ100 厂 家:XILINX 封 装:QFP 批 号:07+ 数 量:2000 说 明:100%真实库存,原装,部分现货 |
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运 费: 所在地:深圳 新旧程度: |
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联系人:陈小姐 |
电 话:0755-83605789 |
手 机:13428979109 |
QQ:656259901,307704921 |
MSN:chenqiongxia18@126.com |
传 真:0755-23816523 |
EMail:656259901@qq.com |
公司地址: 广东深圳市福田区华强北(振华路)赛格高科德电子市场A1848室 |