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SIS963资料 | |
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SIS963 PDF Download |
File Size : 116 KB
Manufacturer:SIS Description:Note 1: INL and DNL is measured using a sine-histogram method. Note 2: Input offset is the voltage required to cause a transition between codes 0 and -1. Note 3: Numbers provided are for DC-coupled case. The user has the choice of AC-coupling, in which case, the DC input voltage level does not matter. Note 4: The peak-to-peak input voltage required, causing a full-scale digitized output when using a trigonometric curve-fitting algo rithm (e.g. FFT). Note 5: Guaranteed by design and characterization. Note 6: Common-mode rejection ratio is defined as the ratio of the change in the offset voltage to the change in the common-mode voltage expressed in dB. Note 7: Measured with analog power supplies tied to the same potential. Note 8: Effective number of bits (ENOB) is computed from a curve-fit referenced to the theoretical full-scale range. Note 9: The clock and input frequencies are chosen so that there are 2041 cycles in an 8,192-long record. Note 10: Signal-to-noise-ratio (SNR) is measured both with the other channel idling and converting an out-of-phase signal. The worst case number is presented. Harmonic distortion components two through five are excluded from the noise. Note 11: Harmonic distortion components two through five are included in the total harmonic distortion specification. Note 12: Both I and Q inputs are effectively tied together (e.g. driven by power splitter). Signal amplitude is -0.5dB FS at an input frequency of fIN = 124.999 MHz. Note 13: Measured with a differential probe, 1pF capacitance. |
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1PCS | 100PCS | 1K | 10K | ||
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型 号:SIS963 厂 家:SIS 封 装:BGA 批 号:08+ 数 量:2000 说 明:绝对原厂原装现货热卖!! |
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运 费: 所在地:深圳 新旧程度: |
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公司地址: 广东深圳市福田区华强北(振华路)赛格高科德电子市场A1848室 |