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| D540003资料 | |
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D540003 PDF Download |
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File Size : 116 KB
Manufacturer:N/A Description:Description Clock input Gate control for Qn outputs. When G is LOW, these outputs are enabled. When G is HIGH, these outputs are asynchronously disabled to the level designated by GL(1). Specifies output disable level. If HIGH, the outputs disable HIGH. If LOW, the outputs disable LOW. Clock outputs Power supply for the device core, inputs, and outputs |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：D540003 厂 家：N/A 封 装：SOP-8 批 号：07+ 数 量：2640 说 明：100%真实库存，原装，部分现货 |
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