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AFE1124E资料 | |
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AFE1124E PDF Download |
File Size : 116 KB
Manufacturer:AD Description:• 200MHz Clock, 400Mbps data rate. • VDD= +2.6V + 0.10V, VDDQ= +2.6V + 0.10V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333 -. Burst length (2, 4, 8) -. Burst type (sequential & interleave) • All inputs except data & DM are sampled at the positive going edge of the system clock(CK) • Data I/O transactions on both edges of data strobe • Edge aligned data output, center aligned data input • LDM,UDM for write masking only (x16) • DM for write masking only (x8) • Auto & Self refresh • 7.8us refresh interval(8K/64ms refresh) • Maximum burst refresh cycle : 8 |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:AFE1124E 厂 家:AD 封 装:SOP 批 号:0503+ 数 量:512 说 明:100%真实库存,原装,部分现货 |
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运 费: 所在地:深圳 新旧程度: |
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公司地址: 广东深圳市福田区华强北(振华路)赛格高科德电子市场A1848室 |