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ADM8628资料 | |
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ADM8628 PDF Download |
File Size : 116 KB
Manufacturer:AD Description: Typical represent average readings at 25C, VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. 3INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. 4Resistor Terminals A, B, W have no limitations on polarity with respect to each other. 5Guaranteed by design and not subject to production test. 6PDISS is calculated from (IDD VDD). CMOS logic level inputs result in minimum power dissipation. 7All dynamic characteristics use VDD = 5 V. 8Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth. The highest R value results in the minimum overall power consumption. 9See the timing diagram for location of measured values. 10Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117 and measured at −40C, +25C, and +85C, typical endurance at 25C is 700,000 cycles. 11Retention lifetime equivalent at junction temperature (TJ) = 55C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6eV derates with junction temperature. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:ADM8628 厂 家:AD 封 装:QFP 批 号:07+ 数 量:1000 说 明:100%真实库存,原装,部分现货 |
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运 费: 所在地:深圳 新旧程度: |
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公司地址: 广东深圳市福田区华强北(振华路)赛格高科德电子市场A1848室 |